Difference Between Edge Triggering and Level Triggering
What is the Difference Between Level Triggering and Edge Triggering?
Edge triggering and level triggering are two different types of triggering methods used in digital circuits. It enables the circuit to initiate the output signal transition from one state to another. These both kinds of triggering are equally important and used to date.
There are two different types of digital circuits, combinational and sequential circuits. The combinational circuit generates an output signal based on its current input state. It does not need any kind of triggering pulse called a clock pulse. Whereas the sequential circuit changes output in the presence of the clock pulse.
Sequential Circuit
A sequential circuit generates output based on its previous output state and current input state. It consists of a combinational circuit with a memory unit such as a flip-flop or latch. Flip-flops are edge-sensitive and latches are level-sensitive. The memory unit is used to provide feedback.
A sequential circuit can be either a synchronous or asynchronous circuit.
A synchronous circuit can change its output state only in the presence of a clock signal. A clock pulse activates the circuit and then it changes its state based on the input and previous output.
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What is a Clock Pulse?
A clock pulse is a periodic pulse signal that continuously oscillates between high state and low state. Usually, it is a square-type signal with a 50% duty cycle. Whereas the frequency of the clock may vary depending on the application.
A clock pulse has two levels i.e. high level and low level. It also has two edges i.e. low to high (rising or positive edge) and high to low (falling or trailing or negative edge)
Edge Triggering
In edge triggering, the sequential circuit can change its state only when a clock edge occurs. Such sequential circuits are also called synchronous sequential circuits because they are synchronized with the edge of the clock. There are two types of edge-triggering
Positive Edge Triggering
In positive edge triggering, the circuit only changes its state when there is a positive or rising edge at the clock input. The clock pulse goes from a low state to a high state. The circuit is said to be a positive edge-triggered circuit.
Negative Edge Triggering
In negative edge triggering, the circuit only activates when there is a negative or falling clock edge. The pulse goes from a high to a low state. Such circuits are called negative or falling edge-triggered circuits.
Edge-triggering circuits are not affected by glitches. There are no error states or delays required for the output to appear.
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Level Triggering
In level triggering, the circuit is triggered during the high level or low level of the clock pulse. Its output changes when the clock level is maintained. Level triggering is divided into two types
Positive Level Triggering
In positive-level triggering, the circuit is triggered only at the high level of the clock pulse.
Negative Level Triggering
In negative-level triggering, the circuit triggers at the low level of the clock pulse.
Level triggering circuit is affected by glitches. There is a time delay required during which the output is erroneous. As we know the level of a clock pulse is relatively longer than the edge of the pulse, and the input state might change during the duration of the level. During this time, the output is said to be in a non-determined state. This can cause glitches in the system. Therefore, the system must wait for the duration called set-up time.
How Does Edge and Level Triggering Work?
Level triggering works as if there is an enable input in a circuit. The circuit could be active high or active low enabled. The enable input is fed through a multiple input AND gate to enable the output of the circuit. Latch
In edge triggering can be easily explained using the given D-flipflop.
D-flipflop is made from two D-latches connected in a master-slave configuration. Where the clock pulse is inverted at one of the latches. The first latch is master D-latch and the second one is slave-latch. When a rising edge occurs, the clk will rise from low to high. At first, the clk is low which will enable the master latch and disable the slave latch.
The master latch will provide output to the slave latch but it won’t process it as it is disabled. Now the clk will rise to the high state. It will disable the master latch and enable the slave latch. The disabled master latch cannot change its state now. However, the slave latch will process the output of the master latch and update its output. This is how this works on a rising edge of a clock pulse.
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Differences between Edge Triggering and Level Triggering
The following table shows the comparisons between Edge and Level Triggering.
Edge Triggering | Level Triggering |
Edge triggering refers to the method of triggering/activating of digital circuits at the presence of the edge of the clock pulse. | Level triggering refers to the triggering of digital circuits at the presence of the level of the clock pulse. |
It only triggers when the clock edge is detected | It is triggered throughout the whole duration of the high or low level. |
It samples the input signal when there is a clock edge | It samples the input signal when there is a level of the clock pulse or control signal. |
The system is free of glitches | There are glitches in the system called metastability |
Edge triggering is used in synchronous sequential circuits. | Level triggering is used in asynchronous sequential circuits. |
Edge triggering is used in applications that require precise timing such as flip-flops, counters, timers, | Level triggering is used in applications that don’t require timing but rather require continuous monitoring of input signals such as latches, sensors, alarms, etc. |
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